| 逻辑类型Logic Type | 与门 AND Gate |
| 电路数Number of Circuits | 2 |
| 输入数Number of Inputs | 2 |
| 电源电压VccVoltage - Supply | 2V~5.5V |
| 静态电流IqCurrent - Quiescent (Max) | 1uA |
| 输出高，低电平电流Current - Output High, Low | -8mA，8mA |
| 低逻辑电平Logic Level - Low | 0.3V~1.1V |
| 高逻辑电平Logic Level - High | 1.7V~4.4V |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | 7ns @ 4.5V ~ 5.5V，50pF |
| Description & Applications | DUAL 2-INPUT AND GATE;Features HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY:VNIH = VNIL= 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:|IOH| = IOL= 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS:tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY |
| 描述与应用 | 双路双输入与门;特性 高速：TPD =3.8ns电源（VCC = 5V时典型值） 低功耗：ICC=1μA（最大值）在TA= 25°C 高抗干扰性：VNIH= VNIL VCC=28％（最小） 掉电保护的投入 对称的输出阻抗：| IOH= IOL=8毫安（MIN）在VCC= 4.5V 平衡传输时延：TPLH≅TPHL 工作电压范围： VCC（OPR）=2V到5.5V 改进的LATCH-UP抗扰度 |