| 最大源漏极电压Vds Drain-Source Voltage | 50V |
| 最大栅源极电压Vgs(±) Gate-Source Voltage | |
| 最大漏极电流Id Drain Current | 3mA |
| 源漏极导通电阻ΩRds DΩ/Ohmain-SouΩ/Ohmce On-State Ω/Ohmesistance | 0.2Ω/Ohm @100mA,5V |
| 开启电压Vgs（th） Gate-Source Threshold Voltage | 1.7V-3.7V |
| 耗散功率Pd Power Dissipation | 1.8W |
| Description & Applications | N-channel enhancement mode vertical D-MOS transistor Vertical power DMOS output stage Overload protected up to 85˚C ambient Overload protection by current limiting and overtemperature sensing Latched overload protection reset by input 5 V logic compatible input level Control of power MOSFET and supply of overload protection circuits derived from input Low operating input current permits direct drive by micro-controller ESD protection on all pins Overvoltage clamping for turn off of inductive loads |
| 描述与应用 | N沟道增强型垂直 D-MOS晶体管 垂直功率DMOS输出 舞台 超载保护 85˚C环境 电流过载保护 限制和过热 传感 锁存过载保护 复位输入 5 V逻辑兼容输入电平 控制功率MOSFET 过载和供应 保护电路 来自输入 低工作输入电流 允许直接驱动 微控制器 所有引脚上的ESD保护 反过来过压钳位 关闭感性负载 |