| 逻辑类型Logic Type | 反相施密特触发器 Inverting Schmitt trigger |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 1 |
| 电源电压VccVoltage - Supply | 3V~5.5V |
| 静态电流IqCurrent - Quiescent (Max) | 1uA |
| 输出高，低电平电流Current - Output High, Low | -8mA，8mA |
| 低逻辑电平Logic Level - Low | 0.1V~0.36V |
| 高逻辑电平Logic Level - High | 1.9V~3.94V |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | 5.8ns @ 4.5V~5.5V，50pF |
| Description & Applications | Schmitt-Trigger Inverter / CMOS Logic Level Shifter ；Features High Speed: tPD = 4.5ns (Typ) @VCC = 5.0 V Low Power Dissipation: ICC = 1 uA (Max) @TA = 25°C TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V CMOS−Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 100; Equivalent Gates = 25 Pb−Free Package is Available |
| 描述与应用 | 施密特触发器逆变器/ CMOS逻辑电平转换器;特性 高速：TPD =延迟时间为4.5ns（典型值）@ VCC=5.0 V 低功耗：ICC=1uA（最大值）@ TA= 25°C TTL兼容的输入：VIL=0.8 V; VIH=2.0 V CMOS兼容输出：VOH> 0.8 VCC VOL<0.1 VCC@负载 掉电保护提供输入和输出 平衡传输延时 引脚和功能兼容与其他标准逻辑系列 芯片复杂度：场效应管=100;等效门= 25 无铅包装可用 |