| 逻辑类型Logic Type | 反相施密特触发器 Inverting Schmitt trigger |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 1 |
| 电源电压VccVoltage - Supply | 4.5V~5.5V |
| 静态电流IqCurrent - Quiescent (Max) | 10uA |
| 输出高，低电平电流Current - Output High, Low | -8mA,8mA |
| 低逻辑电平Logic Level - Low | |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | 5.5ns @ 0.5V，50pF |
| Description & Applications | SINGLE SCHMITT-TRIGGER INVERTER GATE ；EPIC (Enhanced-Performance Implanted CMOS) Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic Small-Outline Transistor (DBV, DCK) Packages |
| 描述与应用 | 施密特触发器逆变器器门;EPIC（增强型注入 CMOS）工艺 输入是TTL电压兼容 闭锁性能超过250 mA每 JESD17 包装选项包括塑料 小外形晶体管（DBV，DCK） 套餐 |