| 逻辑类型Logic Type | 收发器，非反相 Transceiver, Non-Inverting |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 8 |
| 电源电压VccVoltage - Supply | 2 V ~ 3.6 V |
| 静态电流IqCurrent - Quiescent (Max) | 16mA，16mA |
| 输出高，低电平电流Current - Output High, Low | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS description/ordering information (continued) The ’LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff The Iof circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. 2-V to 5.5-V VCC Operation Max tpd of 6.5 ns at 5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports off Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101 |
| 低逻辑电平Logic Level - Low | 具有三态输出的八路总线收发器 描述/订购信息（续） 'LV245A设备是专为数据总线之间的异步通信。该装置 发送数据从A总线到B总线或从B总线到A总线，这取决于对逻辑电平 方向控制（DIR）输入。输出使能（OE）输入可用于禁用设备，以便巴士 有效隔离。 为了确保在开机或断电高阻抗状态，OE应当连接到VCC通过上拉 电阻，电阻的最小值确定的驱动器的电流吸收能力。 这些器件是完全指定部分断电应用程序使用IOFF IOF电路将禁用 输出，防止损坏电流回流通过这些器件的时候都 断电。 “2 V至5.5 V的VCC操作 最大5 V时为6.5 ns吨 典型的VoIP（输出地弹跳） <0.8 V在VCC =3.3 V，TA= 25°C 典型的VOHV（输出VOH冲） >2.3 V在VCC =3.3 V，TA= 25°C 支持混合模式的工作电压 关闭所有端口支持部分掉电模式 手术 闭锁性能超过250 mA每 JESD17 ESD保护超过JESD22 2000-V人体模型（A114-A） 200-V机型号（A115-A） 1000-V带电器件模型（C101“ |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 | |