| 逻辑类型Logic Type | 非反相 Non-Inverting |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 1 |
| 电源电压VccVoltage - Supply | 1.65 V ~ 5.5 V |
| 静态电流IqCurrent - Quiescent (Max) | 32mA，32mA |
| 输出高，低电平电流Current - Output High, Low | This single buffer gate is designed for 1.65-V to 5.5-V VCC operation. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down |
| 低逻辑电平Logic Level - Low | 这种单缓冲闸极设计用于1.65-V到5.5 V的VCC操作。 这个装置是完全指定部分断电应用程序使用IOFF。 IOFF电路关闭输出，防止损坏电流回流通过设备时，断电 |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 | |