| 逻辑类型Logic Type | 非反相 Non-Inverting |
| 电路数Number of Circuits | 2 |
| 输入数Number of Inputs | 1 |
| 电源电压VccVoltage - Supply | 1.65 V ~ 5.5 V |
| 静态电流IqCurrent - Quiescent (Max) | 32mA，32mA |
| 输出高，低电平电流Current - Output High, Low | The SN74LVC2G125 is a dual bus buffer gate WITH 3-STATE OUTPUTS, designed for 1.65-V to 5.5-V VCC operation. This device features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is high.The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down. |
| 低逻辑电平Logic Level - Low | SN74LVC2G125是一个双总线缓冲门具有三态输出，设计用于1.65-V到5.5 V的VCC操作。该器件具有双线路驱动器与3态输出。相关的输出使能（OE）输入输出时禁用高位。IOFF电路关闭输出，防止损坏电流回流通过设备时，断电。 |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 | |