| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 50V/-50V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V/-50V |
| 集电极连续输出电流IC Collector Current(IC) | 50mA/-50mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 1 |
| Q2基极输入电阻R1 Input Resistance(R1) | 10KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 1 |
| 直流电流增益hFE DC Current Gain(hFE) | |
| 截止频率fT Transtion Frequency(fT) | 250MHz |
| 耗散功率Pc Power Dissipation | 150mW/0.15W |
| Description & Applications | Features • General purpose (dual digital transistors) • Both the DTA114E chip and DTC114E chip in a EMT or UMT or SMT package. • Mounting possible with EMT6 or UMT6 or SMT6 automatic mounting machines. • Transistor elements are independent, eliminating interference. • Mounting cost and area can be cut in half. |
| 描述与应用 | 特点 •通用（双数字晶体管） •无论是DTA114E芯片和DTC114E芯片在EMT或UMT或SMT封装。 •安装与EMT6或UMT6或SMT6的自动安装机器。 •晶体管元素是独立的，消除干扰。 •安装成本和面积可减少一半。 |