| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 50V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V |
| 集电极连续输出电流IC Collector Current(IC) | 100mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 1KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 0.1 |
| Q2基极输入电阻R1 Input Resistance(R1) | 1KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 10KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 0.1 |
| 直流电流增益hFE DC Current Gain(hFE) | |
| 截止频率fT Transtion Frequency(fT) | 250MHz |
| 耗散功率Pc Power Dissipation | 150mW/0.15W |
| Description & Applications | Features • General purpose (dual digital transistors) • Two DTC113Z chips in a UMT or SMT package. |
| 描述与应用 | 特点 •通用（双数字晶体管） •两个DTC113Z在UMT或SMT封装的芯片 |