| 逻辑类型Logic Type | 与非门 NAND Gate |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 2 |
| 电源电压VccVoltage - Supply | 4.5V~5.5V |
| 静态电流IqCurrent - Quiescent (Max) | 2uA |
| 输出高，低电平电流Current - Output High, Low | -8mA,8mA |
| 低逻辑电平Logic Level - Low | 0.8v |
| 高逻辑电平Logic Level - High | 2V |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | 9ns @ 4.5V ~ 5.5V，50pF |
| Description & Applications | 2 Input NAND Gate ;High Speed : tpd = 4.2ns (typ) at VCC = 5 V, CL = 15pF • Low Power Dissipation : ICC = 2μA (Max) at Ta = 25℃ • Compatible with TTL outputs : VIL = 0.8 V (max) VIH = 2.0 V (min) • 5.5-V tolerant inputs. • Balanced Propagation Delays : tpLH ≒ tpHL |
| 描述与应用 | 2输入与非门;High Speed : tpd = 4.2ns (typ) at VCC = 5 V, CL = 15pF • Low Power Dissipation : ICC = 2μA (Max) at Ta = 25℃ • Compatible with TTL outputs : VIL = 0.8 V (max) VIH = 2.0 V (min) • 5.5-V tolerant inputs. • Balanced Propagation Delays : tpLH ≒ tpHL |