| 逻辑类型Logic Type | 与非门 NAND Gate |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 2 |
| 电源电压VccVoltage - Supply | 2V~5.5V |
| 静态电流IqCurrent - Quiescent (Max) | 1uA |
| 输出高，低电平电流Current - Output High, Low | -8mA，8mA |
| 低逻辑电平Logic Level - Low | 0.9V~1.65V |
| 高逻辑电平Logic Level - High | 2.2V~3.85V |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | 7.5ns @ 5V，50pF |
| Description & Applications | Single 2-input NAND gate；Features High Speed: tPD = 3.0 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 uA (Max) @ TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 56 |
| 描述与应用 | 单路双输入与非门；特性 高速：TPD =3.0 ns（典型值），VCC= 5 V 低功耗：ICC=1uA（最大值）@ TA= 25°C 掉电保护的输入端 平衡传输延时 引脚和功能兼容与其他标准逻辑系列 芯片的复杂性：FETs= 56 |