| 逻辑类型Logic Type | 非反相 Non-Inverting |
| 电路数Number of Circuits | 2 |
| 输入数Number of Inputs | 1 |
| 电源电压VccVoltage - Supply | 0.8 V ~ 2.7 V |
| 静态电流IqCurrent - Quiescent (Max) | 9mA，9mA |
| 输出高，低电平电流Current - Output High, Low | This dual buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down. |
| 低逻辑电平Logic Level - Low | 这种双重缓冲栅极运行在0.8-V到2.7-V的VCC，但是专门设计用于1.65-V到1.95-V VCC操作。 这个装置是完全指定部分断电应用程序使用IOFF。 IOFF电路禁止输出，防止损坏电流回流通过设备时，断电。 |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 | |