| 集电极-基极反向击穿电压V(BR)CBO Collector-Base Voltage(VCBO) | 50V |
| 集电极-发射极反向击穿电压V(BR)CEO Collector-Emitter Voltage(VCEO) | 50V |
| 集电极连续输出电流IC Collector Current(IC) | 100mA |
| Q1基极输入电阻R1 Input Resistance(R1) | 4.7KΩ/Ohm |
| Q1基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 4.7KΩ/Ohm |
| Q1电阻比(R1/R2) Q1 Resistance Ratio | 1 |
| Q2基极输入电阻R1 Input Resistance(R1) | 4.7KΩ/Ohm |
| Q2基极-发射极输入电阻R2 Base-Emitter Resistance(R2) | 4.7KΩ/Ohm |
| Q2电阻比(R1/R2) Q2 Resistance Ratio | 1 |
| 直流电流增益hFE DC Current Gain(hFE) | 30 |
| 截止频率fT Transtion Frequency(fT) | |
| 耗散功率Pc Power Dissipation | 310mW/0.31W |
| Description & Applications | Features •Dual Bias Resistor Transistors •NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network •Simplifies Circuit Design •Reduces Board Space •Reduces Component Count •The SC−70/SOT−323 package can be soldered using wave or reflow.The modified gull−winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. •Available in 8 mm embossed tape and reel. Use the Device Number to order the 7 inch/3000 unit reel. •Pb−Free Packages are Available |
| 描述与应用 | 特点 •双偏置电阻晶体管 •NPN硅表面贴装晶体管与单片偏置电阻网络 •简化电路设计 •缩小板级空间 •减少了元件数量SC-70/SOT-323包装可以使用波或回流焊接。修改后的鸥翅引线过程中吸收热应力除焊接的模具损坏的可能性。 •可在8 mm压纹带和卷轴。使用设备号到责令7 inch/3000的单位卷轴。 •无铅包可用 |