HUF76129S3ST N沟道MOSFET 30V 5.6A TO-263 marking/标记 76129S 极低的RDS/低栅极电荷
| 最大源漏极电压Vds Drain-Source Voltage | 30V |
| 最大栅源极电压Vgs(±) Gate-Source Voltage | 16V |
| 最大漏极电流Id Drain Current | 5.6A |
| 源漏极导通电阻ΩRds DΩ/Ohmain-SouΩ/Ohmce On-State Ω/Ohmesistance | 0.016Ω/Ohm @5.6A,10V |
| 开启电压Vgs（th） Gate-Source Threshold Voltage | 1-3V |
| 耗散功率Pd Power Dissipation | 105W |
| Description & Applications | 56A, 30V, 0.016 Ohm, N-Channel, Logic Level UltraFET Power MOSFETs These N-Channel power MOSFETs are manufactured using the innovative UltraFET™ process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in applications where power efficiency is important, such as switching regulators, switching converters, motor drivers, relay drivers, lowvoltage bus switches, and power management in portable and battery-operated products • Logic Level Gate Drive • 56A, 30V • Ultra Low On-Resistance, rDS(ON)= 0.016Ω • Temperature Compensating PSPICE® Model • Temperature Compensating SABER©Model • Thermal Impedance SPICE Model • Thermal Impedance SABER Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards |
| 描述与应用 | •逻辑电平栅极驱动器 •56A，30V •超低导通电阻RDS（ON）=0.016Ω •温度补偿的PSPICE®模型 •温度补偿的佩剑©型号 •热阻抗SPICE模型 •热阻抗SABER模型 •峰值电流与脉冲宽度曲线 •UIS等级曲线 •相关文献 - TB334，“指南焊锡表面装载 组件到PC板 |
| 规格书PDF |
