集成电路IC 总线收发器 74LVC245ABQ DHVQFN20/SOT764-1 marking/标记 LVC245
| 逻辑类型Logic Type | 收发器，非反相 Transceiver, Non-Inverting |
| 电路数Number of Circuits | 1 |
| 输入数Number of Inputs | 8 |
| 电源电压VccVoltage - Supply | 1.2 V ~ 3.6 V |
| 静态电流IqCurrent - Quiescent (Max) | 24mA，24mA |
| 输出高，低电平电流Current - Output High, Low | Octal bus transceiver; 3-state The 74LVC245A; 74LVCH245A are 8-bit transceivers featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 5V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low-power consumption Direct interface with TTL levels Inputs accept voltages up to 5.5 V High-impedance when VCC = 0 V Bus hold on all data inputs (74LVCH245A only) Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 C to +85 C and 40 C to +125 C |
| 低逻辑电平Logic Level - Low | 八路总线收发器，三态 该74LVC245A;74LVCH245A是8位具有非反相3态总线收发器 兼容输出都发送和接收方向。该器件具有输出 启用（OE）输入，方便级联和发送/接收的方向控制（DIR）输入。 OE控制输出使巴士有效隔离。 输入可驱动无论从3.3 V或5 V设备。禁用时，高达5.5 V，可以应用到输出。这些特性允许使用这些设备，在混合 3.3伏和5伏的应用程序。 该74LVCH245A总线保持数据输入无需外部上拉起来 持有未使用的输入电阻。 5V容限输入/输出接口与5 V逻辑 宽电源电压范围从1.2 V到3.6 V CMOS低功耗 直接接口TTL水平 输入接受高达5.5 V的电压 高阻抗时VCC= 0 V 总线保持所有数据输入（仅74LVCH245A） 符合JEDEC标准： JESD8-7A（1.65 V至1.95 V） JESD8-5A（2.3 V到2.7 V） JESD8-C/JESD36（2.7 V至3.6 V） ESD保护： HBM JESD22-A114F超过2000 V MM JESD22-A115B超过200 V CDM JESD22-C101E超过1000 V 40C至+85C40C至125C |
| 高逻辑电平Logic Level - High | |
| 传播延迟时间@Vcc，CLMax Propagation Delay @ V, Max CL | |
| Description & Applications | |
| 描述与应用 |
| 规格书PDF |
